The present invention generally relates to an architecture for both a hardware and a software used within a computer, and more specifically, to a computer including a loosely coupled multiprocessor.
Conventional computers have been developed and have progressed in such a manner that elements are highly integrated and physical distances among the elements are reduced as much as possible in order to increase processing speeds of these computers.
In FIG. 8, there is shown a schematic block diagram of a basic construction of the conventional computer.
A computer 80 includes as five major devices, a calculation device 81, a control device 82, a storage device 83, an input device 84, and an output device 85. Further, both the calculation device 81 and the control device 82 are incorporated into a central processing unit (referred to as a "CPU").
The computer 80 with the above-described construction executes the following operations.
First, a program is read out from the input device 84, and then is stored into a program region within the storage device 83. The control device 82 sequentially reads out the programs stored within this storage device 83 one by one so as to be decoded, and thereafter sends various instructions to the input device 84, output device 85 and storage device 83 which are required to execute commands written in the programs.
When, for instance, the command of the program corresponds to a command (READ command and the like) for requesting a data input, the inputted data is stored into an input region within the storage device 83.
Also, when the decoded command corresponds to a calculation command, data to be calculated is sent to the calculation device 81 in which a predetermined calculation is carried out.
Furthermore, data to be outputted is stored into an output region of the storage device 83. In response to an output command (WRITE command), the data stored in this output region is outputted by utilizing the output device 85.
As previously described, the computer 80 fetches the commands stored in the storage device 83 one by one, and executes processing operations in accordance with the programmed sequence.
Various system arrangements have been proposed in order to increase reliability of the computer systems with employment of such computers.
Among these computer systems, there is a multiprocessor system. In accordance with the multiprocessor system, a plurality of processors (processing device including CPU as an element) constitute a system for commonly using a main storage device and a file. When malfunction happens to occur, if only failed devices, processors, or a troubled unit employed within the main storage device are isolated from the computer system, the computer system may continue the processing operations, although the processing capabilities of the data are lowered. As a consequence, such a multiprocessor computer system has better adaptability and therefore is suitable for constituting a large-scale on-line computer system.
This multiprocessor system may be further understood as one of parallel-processing computer systems.
"Parallel processing" operations imply that processing operations which have been performed by a single processor employed within the conventional computer, are performed in a parallel form by parallel-operating plural processors. As a result, highspeed processing operations may be realized.
As to the parallel processing operation, it may be subdivided into SIMD (Single Instruction Multiple Datastream; a single instruction and plural data method), and MIMD (Multiple Instruction Multiple Datastream; a plural-instruction and plural data method), depending upon arrangements of processors and processing methods.
The "SIMD" method is such a method wherein a plurality of processors execute plural data in synchronization with each other in response to the same instruction supplied from a central control device. Since each of the processors can parallel-execute the same instruction in this SIMD method, this method is suitable for such a case that similar types of calculations are performed for a large quantity of data.
In accordance with the MIMD method, on the other hand, each of the processors is independently operable, and a plurality of data processing operations are executed in an asynchronization mode in response to a plurality of different instructions. Since the respective processors are separately operated, control functions are provided within these processors. Also, communication networks to perform information exchanges among the respective processors are provided, which is similar to that of the SIMD method.
FIG. 9 is a schematic block diagram for representing a system arrangement of the MIMD method.
A processor (1) 911, a processor (2) 912, and a processor (n) 913 include an ALU (arithmetic logic unit) 914, a storage unit 915, a control unit (1) 914, a control unit (2) 917, and further a control unit (n) 918, respectively, and are connected to either a coupling network, or a shared memory 919.
A multiprocessor system which corresponds to an MIMD method, is constructed so that a large number of processors closely communicate with each other with employment of a highspeed coupling network and are operable in a parallel mode with better cooperation.
Then, the multiprocessor system is roughly categorized into two communication methods effected among the processors.